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对比文件列表
2001-07-10_JP2001189343A_发明专利_JP2001189343A Wire-bonding method and semiconductor device_+++A_C_D_E_F_G_H_I+++.docx
2026-07-22 17:36
2001-07-12_KR1020010067448A_发明公开_KR1020010067448A 반도체 장치의 구리 상호 접속을 위한 와이어 본딩 방법 및 반도체 장치_+++C_D_E_F_G_H_I_a_j+++.docx
2026-07-22 17:36
2001-11-21_GB2362510A_发明专利_GB2362510A Wire bonding method for semiconductor devices_+++C_D_E_F_G_H_I_a+++.docx
2026-07-22 17:36
2001-12-21_TW469592B_发明专利_TW469592B 半導體裝置中銅內連線之引線接合方法_+++C_D_E_F_G_H_I_a+++.docx
2026-07-22 17:36
2002-12-12_US2002187254A_发明申请_US20020187254A1 Ultrasonically sealing the cover plate to provide a hermetic enclosure for OLED displays_+++A_C_G_I_J_k_l_m+++.docx
2026-07-22 17:36
2003-02-12_GB2378564A_发明专利_GB2378564A Flexible light emitting device with incompressible spacers_+++A_I_c_j+++.docx
2026-07-22 17:36
2003-02-18_US6520821B_发明授权_US06520821B1 Device package and device encapsulation method_+++A_C_I_J+++.docx
2026-07-22 17:36
2004-09-14_US6790757B_发明授权_US06790757B1 Wire bonding method for copper interconnects in semiconductor devices_+++A_C_D_E_F_G_H_I+++.docx
2026-07-22 17:36
2005-02-17_US2005035466A_发明申请_US20050035466A1 Wire bonding method for copper interconnects in semiconductor devices_+++A_C_D_E_F_G_H_I+++.docx
2026-07-22 17:36
2005-10-04_US6952078B_发明授权_US06952078B1 Encapsulation for organic LED device_+++A_C_I_J+++.docx
2026-07-22 17:36
2006-04-06_JP2006093743A_发明专利_JP2006093743A Semiconductor device_+++A_C_D_E_F_G_H_I+++.docx
2026-07-22 17:36
2006-07-12_JP3796116B_发明专利_JP3796116B2 Wire bonding method and a semiconductor device_+++A_C_D_E_F_G_H_i_j+++.docx
2026-07-22 17:36
2006-10-03_US7115994B_发明授权_US07115994B2 Semiconductor substrate and method of fabricating semiconductor device_+++A_B_C_G_H_I_J+++.docx
2026-07-22 17:36
2006-12-28_US2006290271A_发明申请_US20060290271A1 OLED device having spacers_+++A_B_C_I_J+++.docx
2026-07-22 17:36
2006-12-28_US2006290276A_发明申请_US20060290276A1 OLED device having spacers_+++B_C_I_a_j+++.docx
2026-07-22 17:36
2007-03-22_JP2007073353A_发明专利_JP2007073353A Method for manufacturing organic electroluminescence element_+++A_B_C_I_J_g+++.docx
2026-07-22 17:36
2007-03-22_US2007065962A_发明申请_US20070065962A1 MANUFACTURING OF OPTOELECTRONIC DEVICES_+++G_H_I_a_b_c_j+++.docx
2026-07-22 17:36
2007-08-22_EP1763287A_发明公开_EP1763287A2 A method for fabricating organic electroluminescent devices_+++A_B_C_I_J_g+++.docx
2026-07-22 17:36
2001-11-21_GB2362510A_发明专利_GB2362510A Wire bonding method for semiconductor devices_+++C_D_E_F_G_H_I_a+++.docx

**对比文件名称**:2001-11-21_GB2362510A_发明专利_GB2362510A Wire bonding method for semiconductor devices

**目标专利名称**:1295利用导体接触器件CN102150294B

**本次调用的模型名称**:GPT-4(基于深度学习的语言模型)

### 特征比对表格

技术特征描述及公开性判断结果对比文件原文引用(翻译)公开性论述
**技术特征A**:该器件(1)包括具有至少一个单元(3)、接触区(4)和封装(5)的衬底(2)<br>《隐含公开》对比文件摘要:“A method for wire bonding to a semiconductor device having a conductive interconnect region (e.g., a copper bond pad) encapsulated by a passivation layer.”<br>说明书第2页第2段:“The invention relates to the field of integrated circuits (IC) and semiconductor devices.”<br>图5(a)描述:“Bonding Pad 50 is formed on a Substrate 52 (which can be any IC structure) using metal (e.g., Cu) interconnect as the bonding pad. A passivation layer (54) of Ta is then deposited onto Substrate 52, encapsulating the Cu interconnect.” 以及“Substrate 52 may comprise a semiconductor substrate having devices formed therein.”(翻译:衬底52可以包括其中形成有器件的半导体衬底。)对比文件公开了衬底(substrate)、接触区(铜焊盘)和封装(钝化层),并明确衬底中形成有器件(即单元),本领域技术人员可以合理推断出该器件包括至少一个单元、接触区和封装,故隐含公开。
**技术特征B**:所述封装包括薄膜并且该薄膜包含氮化硅、碳化硅或氧化铝<br>《未公开》对比文件使用钽(Ta)作为钝化层,例如:“a passivation layer of Ta is deposited onto Substrate 52, encapsulating the Cu interconnect.” 以及“In a specific embodiment of the invention, tantalum (Ta) is used to encapsulate the copper interconnect material.”对比文件中封装材料为钽,与目标专利限定的氮化硅、碳化硅或氧化铝完全不相关,没有公开任何这些材料,也未给出任何启示,故未公开。
**技术特征C**:其中所述封装(5)封装至少接触区(4)<br>《直接公开》摘要:“...encapsulated by a passivation layer.”<br>说明书第3页:“a passivation layer is formed to encapsulate the interconnect material such that the wire bonds with the passivation layer...”<br>图3(a)描述:“A passivation layer 32 is overlaid on the surface of the substrate 34, encapsulating the Cu interconnect.”<br>图5(a):“a passivation layer (54) of Ta is then deposited onto Substrate 52, encapsulating the Cu interconnect.”对比文件明确公开了钝化层(封装)封装铜互连(接触区),因此直接公开该特征。
**技术特征D**:将导体(6)设置在封装(5)上<br>《直接公开》图3(b)描述:“a wedge bond 36 between the Al wire 30 and the substrate 34 is formed under load or ultrasonic excitation. Note that the wedge bond 36 is not directly formed on the surface of the Cu interconnect 31. Instead, the wedge bond 36 is formed in the Ta passivation layer 32.”<br>说明书第5页:“Al wire is wedge bonded with the Ta layer.”对比文件明确将铝线(导体)设置在钝化层(封装)上并通过楔形接合与其连接,因此直接公开。
**技术特征E**:在不事先移除导体(6)与接触区(4)之间的封装(5)的情况下将导体(6)与接触区(4)互连<br>《直接公开》说明书第3页:“The invention provides a novel method of using wire bonding technology... a passivation layer is formed to encapsulate the interconnect material such that the wire bonds with the passivation layer, but not with the interconnect material.”<br>图3(b)描述,未提及任何移除步骤。对比文件中没有教导或暗示在接合前移除钝化层,而是直接接合到钝化层,并通过钝化层与接触区形成电连接,相当于在不事先移除封装的情况下实现互连,直接公开。
**技术特征F**:其中将导体(6)与接触区(4)互连包括超声焊接<br>《直接公开》说明书第4页:“The bonding can be accomplished by simultaneously applying a vertical load or ultrasonically exciting the gold wire.”<br>图3(b)描述:“under load or ultrasonic excitation.”对比文件明确使用超声激励(超声焊接)进行接合,因此直接公开。
**技术特征G**:其中所述导体(6)包括金属线<br>《直接公开》说明书第3页:“In a specific embodiment of the invention, tantalum (Ta) is used to encapsulate the copper interconnect material. An aluminum (or aluminum alloy) wire... is used.”<br>图3(a):“the wire 30 used in this wedge bonding process is an Al wire.”对比文件中的导体明确为铝线或金线等金属线,直接公开。
**技术特征H**:其中所述金属线是扁平的和/或包含铜、铝或银<br>《直接公开》说明书第3页:“An aluminum (or aluminum alloy) wire, as opposed to a gold wire, is used in the wire bonding process.” 以及“Al wire”。对比文件中的金属线包含铝,满足“包含铜、铝或银”的条件,且“和/或”关系仅需满足其一,故直接公开。
**技术特征I**:其中所述接触区(4)用作用于所述单元(3)的电极<br>《直接公开》图5(a)描述:“Bonding Pad 50 is formed on a Substrate 52 (which can be any IC structure) using metal (e.g., Cu) interconnect as the bonding pad.”<br>说明书第2页:“Cu bond pad”用于互连。对比文件中的接触区(铜焊盘)用于连接半导体器件(单元),作为电极使用,直接公开。
**技术特征J**:其中所述封装(5)封装至少所述接触区(4)和所述至少一个单元(3)<br>《未公开》图5(a):“a passivation layer (54) of Ta is then deposited onto Substrate 52, encapsulating the Cu interconnect.” 未明确封装单元。对比文件仅公开钝化层封装铜焊盘,未明确封装单元,本领域技术人员无法毫无疑义地得出封装也封装单元,也无合理推断,故未公开。
**技术特征K**:其中所述超声焊接工作于≥10kHz与≤80kHz之间<br>《未公开》对比文件未提及超声焊接的频率参数。对比文件没有公开任何关于超声焊接频率的信息,故未公开。
**技术特征L**:其中所述超声焊接工作于≥30kHz与≤40kHz之间<br>《未公开》对比文件未提及超声焊接的频率参数。对比文件没有公开,故未公开。
**技术特征M**:其中所述超声焊接工作于35kHz<br>《未公开》对比文件未提及超声焊接的频率参数。对比文件没有公开,故未公开。
**技术特征N**:一种能够通过根据权利要求1-9中任一项的方法得到的OLED(1)<br>《未公开》对比文件涉及半导体器件,未涉及OLED。对比文件不涉及OLED,也未公开通过该方法得到OLED,故未公开。

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